Recently, a nonvolatile semiconductor memory device including memory cells each including a select transistor and a memory cell transistor is proposed.
In such nonvolatile semiconductor memory device, the memory cell is selected by suitably selecting a bit line, a word line, a source line, etc. by a column decoder and a row decoder to thereby make readings, writings, erasings, etc. in selected one of the memory cells.
The background art is as follows.    Japanese Laid-open Patent Publication No. 2000-235797;    Japanese Laid-open Patent Publication No. 2005-268621; and    Japanese Laid-open Patent Publication No. 2004-228396.